An integrated gate-driven shift register circuit is formed by cascading a plurality of shift register units to output gate driving pulse signals for controlling image display. As the integration is achieved on an array substrate, by obviating separate integrated circuits, substantial cost reduction may be achieved. Numerous embodiments may be practiced to make the shift register unit having various numbers of transistors (T) and capacitors (C). For example, the shift register unit may include 12T1C, 9T1C, or 13T1C circuitries. The gate driving pulse signal is generated at least by using a set of clock signals, a pull-up transistor, a pull-down transistor, and an output transistor in each shift register unit.